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| NJU39612 MICROSTEPPING MOTOR CONTROLLER WITH DUAL DAC s GENERAL DESCRIPTION NJU39612 is a dual 7-bit+sign; Digital-to-Analog Converter (DAC) developed to be used in micro stepping applications together with the dual stepper motor driver. The NJU39612 has a set of input registers connected to an 8-bit data port for easy interfacing directly to a microprocessor. Two registers are used to store the data for each seven-bit DAC, the eighth bit being a sign bit (sign/magnitude coding). s PACKAGE OUTLINE NJU39612E2 s FEATURES * Analog control voltages from 3V down to 0.0V * High-speed microprocessor interface * Full -scale error * Fast conversion speed * Package EMP20 1 LSB 3 s * Matches the dual stepper motor drivers s BLOCK DIAGRAM V DD V Ref NJU39612 WR Sign 1 E1 CS C DA- Data 1 E D D/A R DA 1 A0 E2 DA D/A DA- Data 2 2 E D7 - D0 C D R POR RESET R Sign 2 V ss Figure 1. Block Diagram NJU39612 s PIN CONFIGURATION Vref 1 DA1 2 Sign1 3 VDD 4 WR 5 D7 6 D6 7 D5 8 D4 9 D3 10 20 Reset 19 DA2 18 Sign2 17 Vss NJU39612E2 16 CS 15 NC 14 A0 13 D0 12 D1 11 D2 Figure 2. Pin configuration s PIN DESCRIPTION Refer to figure 2. EMP Symbol Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 VRef DA1 Sign1 VDD WR D7 D6 D5 D4 D3 D2 D1 D0 A0 NC CS VSS Sign2 DA2 Reset Voltage reference supply pin, 2.5 V nominal (3.0 V maximum) Digital-to-Analog 1, voltage output. Output between 0.0 V and Vref - 1 LSB. Sign 1, TTL/CMOS level. To be connected directly to NJM377x phase input. Databit D7 is transfered non inverted from NJU39612 data input. Voltage Drain-Drain, logic supply voltage. Normally +5 V. Write, TTL/CMOS level, input for writing to internal registers. Data is clocked into flip flops on positive edge. Data 7, TTL/CMOS level, input to set data bit 7 in data word. Data 6, TTL/CMOS level, input to set data bit 6 in data word. Data 5, TTL/CMOS level, input to set data bit 5 in data word. Data 4, TTL/CMOS level, input to set data bit 4 in data word. Data 3, TTL/CMOS level, input to set data bit 3 in data word. Data 2, TTL/CMOS level, input to set data bit 2 in data word. Data 1, TTL/CMOS level, input to set data bit 1 in data word. Data 0, TTL/CMOS level, input to set data bit 0 in data word. Address 0, TTL/CMOS level, input to select data transfer, A0 selects between cannel 1 (A0 = LOW) and channel 2 (A0 = HIGH). Not connected Chip Select, TTL/CMOS level, input to select chip and activate data transfer from data inputs. LOW level = chip is selected. Voltage Source-Source. Ground pin, 0 V reference for all signals and measurements unless otherwise noted. Sign 2. TTL/CMOS level. To be connected directly to NJM377x phase input. Data bit D7 is transfered non-inverted from NJU39612 data input. Digital-to-Analog 2, voltage output. Output between 0.0 V and Vref - 1 LSB. Reset, digital input resetting internal registers. HIGH level = Reset, VRes 3.5 V = HIGH level. Pulled low internally. NJU39612 s DEFINITION OF TERMS Resolution Resolution is defined as the reciprocal of the number of discrete steps in the DAC output. It is directly related to the number of switches or bits within the DAC. For example, NJU39612 has 27, or 128, output levels and therefor has 7 bits resolution. Remember that this is not equal to the number of microsteps available. Linearity Error Linearity error is the maximum deviation from a straight line passing through the end points of the DAC transfer characteristic. It is measured after adjusting for zero and full scale. Linearity error is a parameter intrinsic to the device and cannot be externally adjusted. Power Supply Sensitivity Power supply sensitivity is a measure of the effect of power supply changes on the DAC full-scale output. Settling Time Full-scale current settling time requires zero-to-full-scale or full-scale-to-zero output change. Settling time is the time required from a code transition until the DAC output reaches within 1/2LSB of the final output value. Full-scale Error Full-scale error is a measure of the output error between an ideal DAC and the actual device output. Differential Non-linearity The difference between any two consecutive codes in the transfer curve from the theoretical 1LSB, is differential non-linearity Monotonic If the output of a DAC increases for increasing digital input code, then the DAC is monotonic. A 7-bit DAC which is monotonic to 7 bits simply means that increasing digital input codes will produce an increasing analog output. NJU39612 is monotonic to 7 bits. s FUNCTIONAL DESCRIPTION Each DAC channel contains one register and a D/A converter. A block diagram is shown on the first page. The sign outputs generate the phase shifts, i.e., they reverse the current direction in the phase windings. Data Bus Interface NJU39612 is designed to be compatible with 8-bit microprocessors such as the 6800, 6801, 6803, 6808, 6809, 8051, 8085, Z80 and other popular types and their 16/32 bit counter parts in 8 bit data mode. The data bus interface consists of 8 data bits, write signal, chip select, and two address pins. All inputs are TTL-compatible (except reset). The address pin control data transfer to the two internal D-type registers. Data is transferred according to figure 7 and on the positive edge of the write signal. Output Output Output Actual Gain error Correct Endpoint non-linearity More than 2 bits Less than 2 bits Negative difference Positive difference Offset error Input Input Full scale Input Figure 3. Errors in D/A conversion. Figure 4. Errors in D/A conversion. Differential non-linearity of more than Differential non-linearity of less than 1 bit, output is non-monotonic. 1 bit, output is monotonic. Figure 5. Errors in D/A conversion. Non-linearity, gain and offset errors. NJU39612 Current Direction, Sign1 & Sign2 These bits are transferred from D7 when writing in the respective DA register. A0 must be set according to the data transfer table in figure 7. DA1 and DA2 These are the two outputs of DAC1 and DAC2. Input to the DACs are internal data bus (Q61 ... Q01) and (Q62 ... Q02). Reference Voltage VRef VRef is the analog input for the two DACs. Special care in layout, gives a very low voltage drop from pin to resistor. Any VRef between 0.0 V and VDD can be applied, but output might be non-linear above 3.0 V. Power-on Reset This function automatically resets all internal flip flops at power-on. This results in VSS voltage at both DAC outputs and all digital outputs. Reset If Reset is not used, leave it disconnected. I2 [mA] T max T2 [mNm] Tnom Tmin I I1 [mA] T1 [mNm] Figure 6a. Assuming that torque is proportional to the current in resp. winding it is possible to draw figure 8b. Figure 6b. An example of accessible positions with a given torque deviation/fullstep. Note that 1:st step sets highest resolution. Data points are exaggerated for illustration purpose. TNom = code 127. CS 0 0 1 A0 0 1 X Data Transfer D7 --> Sign1, (D6--D0) --> (Q61--Q01) D7 --> Sign2, (D6--D0) --> (Q62--Q02) No Transfer Figure 7. Table showing how data is transfered inside NJU39612. NJU39612 s ABSOLUTE MAXIMUM RATINGS Parameter Pin no. Symbol Min Max Unit Voltage Supply Logic inputs Reference input Current Logic inputs Temperature Storage temperature Operating ambient temperature 4 5-14,16 1 5-14,16 VDD VI VRef II Tstg Topr -0.3 -0.3 -0.4 6 VDD+ 0.3 VDD+ 0.3 +0.4 V V V mA C C -55 -20 +150 +85 s RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Typ Max Unit Supply voltage Reference voltage Rise and fall time of WR VDD VRef tr, tf 4.75 0 - 5.0 2.5 - 5.25 3.8 1 V V s NJU39612 s ELECTRICAL CHARACTERISTICS Electrical characteristics over recommended operating conditions. Parameter Symbol Conditions Min Typ Max Unit Logic Input Reset logic HIGH input voltage Reset logic LOW input voltage Logic HIGH input voltage Logic LOW input voltage Reset input current Input current, other inputs Input capacitance Internal Timing Characteristics Address setup time Data setup time Chip select setup time Address hold time Data hold time Chip select hold time Write cycle length Reset cycle length Reference Input Input resistance Logic Outputs Logic HIGH output current Logic LOW output current Write propagation delay Reset propagation delay DAC Outputs Nominal output voltage Resolution Offset error Gain error Endpoint nonlinearity Differential nonlinearity Load error Power supply sensitivity Conversion speed VIHR VILR VIH VIL IIR II VSS < VIR < VDD VSS < VI < VDD 3.5 2.0 -0.01 -1 60 60 70 50 80 6 3 9 -13 5 30 60 0.1 0.8 1 1 20 20 20 -5 100 150 V V V V mA A pF ns ns ns ns ns ns ns ns kohm mA mA ns ns tas tds tcs tah tdh tch tWR tres Rref IOH IOL tpwr tpres Valid for A0 Valid for D0 - D7 VO = 2.4 V VO = 0.4 V From positive edge of WR. Outputs valid, Cload = 120 pF From positive edge of Reset to outputs valid, Cload = 120 pF Reset open, VRef = 2.5 V 2 - VDA 0 - 7 0.2 0.1 0.2 0.2 0.1 0.1 3 tDAC (VDA, unloaded - VDA, loaded) Rload = 2.5 kohm, Code 127 to DAC Code 127 to DAC 4.75 V < VDD < 5.25 V For a full-scale transition to 0.5 LSB of final value, Rload = 2.5 kohm, Cload = 50 pF. VRef - 1LSB 0.5 0.5 0.5 0.5 0.5 0.3 8 V Bits LSB LSB LSB LSB LSB LSB s NJU39612 t cs CS t as A0 t ds D0-D7 t WR t DAC WR t ch t ah t dh DA t pwr Sign Figure 8. Timing t res Reset t pres Sign Figure 9. Timing of Reset NJU39612 s APPLICATIONS INFORMATION How Many Microsteps? The number of true microsteps that can be obtained depends upon many different variables, such as the number of data bits in the Digital-to-Analog converter, errors in the converter, acceptable torque ripple, single- or double-pulse programming, the motor's electrical, mechanical and magnetic characteristics, etc. Many limits can be found in the motor's ability to perform properly; overcome friction, repeatability, torque linearity, etc. It is important to realize that the number of current levels, 128 (27), is not the number of steps available. 128 is the number of current levels (reference voltage levels) available from each driver stage. Combining a current level in one winding with any of 128 other current levels in the other winding will make up 128 current levels. So expanding this, it is possible to get 16,384 (128 * 128) combinations of different current levels in the two windings. Remember that these 16,384 micropositions are not all useful, the torque will vary from 100% to 0% and some of the options will make up the same position. For instance, if the current level in one winding is OFF (0%) you can still vary the current in the other winding in 128 levels. All of these combinations will give you the same position but a varying torque. Typical Application The microstepper solution can be used in a system with or without a microprocessor. Without a microprocessor, a counter addresses a ROM where appropriate step data is stored. Step and Direction are the input signals which represent clock and up / down of counter. This is the ideal solution for a system where there is no microprocessor or it is heavily loaded with other tasks. With a microprocessor, data is stored in ROM / RAM area or each step is successively calculated. NJU39612 is connected like any peripheral addressable device. All parts of stepping can be tailored for specific damping needs etc. This is the ideal solution for a system where there is an available microprocessor with extra capacity and low cost is more essential than simplicity. See typical application, figure 13. s User Hints Never disconnect ICs or PC Boards when power is supplied. Select a motor that is rated for the current you need to establish desired torque. A high supply voltage will gain better stepping performance even if the motor is not rated for the VMM voltage, the current regulation in the drivers from New JRC will take care of it. A normal stepper motor might give satisfactory result, but while microstepping, a "microstepping-adapted" motor is recommended. This type of motor has smoother motion due to two major differences, the stator / rotor teeth relationship is non-equal and the static torque is lower. The NJU39612 can handle programs which generate microsteps at a desired resolution as well as quarter stepping, half stepping, full stepping, and wave drive. Ramping Every drive system has inertia which must be considered in the drive system. The rotor and load inertia play a big role at higher speeds. Unlike the DC motor, the stepper motor is a synchronous motor and does not change its speed due to load variations. Examining a typical stepper motor's torque-versus-speed curve indicates a sharp torque drop-off for the "start-stop without error" curve. The reason for this is that the torque requirements increase by the cube of the speed change. For good motor performance, controlled acceleration and deceleration should be considered even though microstepping will improve overall performance. NJU39612 Time when motor is in a compromise position. Time when micro position is correct. Write signal. Motor position. Writing to channel 1. Writing to channel 2. Time Useful time = correct position Double pulse write signal Ideal data = desired position Actual data = true position Normal resolution Write time = incorrect position Figure 10. Double pulse programming, in- and output signals. Time when motor is in an intermediate position. Time when micro position is almost correct. Write signal. Motor position. Note that position is always a compromise. Writing to channel 1. Writing to channel 2. Single pulse write signal "Ideal data" = desired position Actual data = true position Note increased resolution Useful time = compromise position with equally spaced angles Time Useful time = almost correct position Figure 11. Single pulse programming, in- and output signals. NJU39612 s Programming NJU39612 There are basically two different ways of programming the NJU39612. They are called "single-pulse programming" and "double-pulse programming." Writing to the device can only be accomplished by addressing one register at a time. When taking one step, at least two registers are normally updated. Accordingly there must be a certain time delay between writing to the first and the second register. This programming necessity gives some special stepping advantages. Double-pulse Programming The normal way is to send two write pulses to the device, with the correct addressing in between, keeping the delay between the pulses as short as possible. Write signals will look as illustrated in figure10. The advantages are: * low torque ripple * correct step angles between each set of double pulses * short compromise position between the two step pulses * normal microstep resolution Single-pulse Programming A different approach is to send one pulse at a time with an equally-spaced duty cycle. This can easily be accomplished and any two adjacent data will make up a microstep position. Write signals will look as in figure 11. The advantages are: * higher microstep resolution * smoother motion The disadvantages are: * higher torque ripple * compromise positions with almost-correct step angles NJU39612 D0-D7 Counter PROM NJU39612 NJM3777 A0 WR CE Clock Up/Dn CS Vref Step Direction Control Logic Voltage Reference Figure 12. Typical blockdiagram of an application without a microprocessor. V CC (+5 V) + 0.1 F 0.1 F V MM 10 F 4 13 D0 V DD V Sign1 3 10 11 6 To P D7 DA1 Sign2 2 18 8 Phase1 Dis1 V R1 13 CC 5 V MM1 20 V MM2 MA1 4 MB1 2 21 14 A0 5 WR 16 CS 20 RESET 1 V Ref NJU39612 15 14 NJM3777 Phase Dis2 V R2 RC GND 12 6, 7, 18, 19 MB2 C1 9 E1 3 C2 16 E2 22 2 MA2 +2.5V VSS 17 DA2 19 17 23 STEPPER MOTOR +5 V 12 k 4700 pF Pin numbers refer to EMP package. 0.47 0.47 RS RS GND (VCC ) GND (V MM) Figure 13. Typical application in a microprocessor based system. The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. |
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